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Argon Family of Computers

The history of domestic mobile computer engineering as a separate branch of technology began in early 1960s. In 1964, for the first time in the USSR, the Research Institute of Electronic Machines (NIEM) started design and production of a computer family dubbed Argon. After the Institute's merger with NICEVT at the end of 1968 the development of Argon computers was continued at a specialized division that in 1986 became an independent organization called NII Argon. Since then more than 30 models of computers and computer systems have been developed.

Argon family was created in three stages. During the first stage (1964 - mid 70s) 11 types of computers for space, airborne and ground automated control systems were produced.

Computers used in control systems of space vehicles and mobile ground installations must comply with a number of special requirements which considerably complicated the design of mobile machines. To choose the right solutions, it was necessary to consider such key issues as limitations on weight, size and power consumption; high reliability; resistance to different environmental impacts including mechanical, weather, radiation etc.; ability to communicate in real time with various sensors and actuators of a controlled installation.

Airborne Computers of the First Stage

The first stage of development was based on certain fundamental postulates formulated with regard to specific requirements for mobile computers after numerous researches, conceptual and detail designs.

Argon-10 computer

"Argon-10" computer

By components used the first-stage computers can be divided into two groups. The first one, which had come into production earlier, included Argon-1, Argon-10 together with its Argon-10М modification, Argon-11А and 11С, Argon-12А and 12С. All these machines were based on Tropa series hybrid ICs. The second group comprised Argon-14, Argon-15, Argon-16 and Argon-17 computers which used solid-state ICs.

Tropa-1 line of hybrid ICs was developed by NIEM together with NIITT Institute of the USSR Ministry of Electronic Industry for early Argon family of computers (Argon-1, Argon-11А and 11С, Argon 12А and 12С. However, relatively high performance (delay 60 ns, power consumption 5,5 mW per NAND gate) and functional versatility stipulated wide use of Tropa-1 ICs both in mobile and stationary computers. The process was leveraged by the unique circuitry developed at NIIEM, which allowed satisfying the requirements despite the limited possibilities of computer engineering at that time. Later NIEM and NIITT created Tropa-3 and Tropa-5 lines of hybrid ICs, which were used in Argon-10 and Argon-10М computers and made it possible to raise calculation performance up to 200,000 operations per second.

The machines of the second group (Argon-14, Argon-15 and Argon-16) used the first standard solid-state ICs such as 106, 133, 134 series, whereas Argon-17 was based on the first microprocessor LSIs of 583 series.

Much attention in designing was paid to the definition of parameters of printed circuit boards which were the main constructive components of computers. The following requirements were taken into consideration: placing each full-function computer on a separate board, standardization of their physical dimensions, adaptability to manufacture and use of automated production facilities. After intensive research two standard designs of printed circuit boards were chosen. The first one 230х330 mm in size was equipped with 141 terminals and could accommodate up to 152 Tropa hybrid ICs, the second standard board 148х198 mm in size with 136 terminals allowed mounting of up to 96 solid-state ICs.

Airborne computers based on Tropa ICs with pin-type connectors used mostly two-side PCBs. Argon-10 and Argon-10M machines were equipped with four-layer boards manufactured by pairwise pressing.

Argon-14, Argon-15, Argon-16 and Argon-17 machines were based on standard multilayer PCBs manufactured by sequential laminating (up to five separate layers). This method provides high density of printed conductors and improves communication capabilities, and also ensures very high reliability unachievable with other methods.

In both groups of computers printed circuit boards are assembled in book-like packages. Research and practice demonstrated that such a design meets the requirements of mechanical resistance specific to mobile computers much better than others. The boards in a package are connected by a hinged rubber block (so-called "spine") and can turn through a definite angle to ease an access to components during manufacture and setting up. Electric connections between boards are done by flexible wires soldered to output terminals on the boards and fixed in the "spine". The boards are fastened with rigid studs and equipped with stops to weaken resonance. Thus the assembled board package is quite stiff and proof against mechanical impact.

Book-like PCB packages are universal components suitable both for machines built of separate functional modules and single-unit computers. The building-block principle was used in attended airborne and mobile ground computers such as Argon-1, Argon-10 and 10М, Argon-15 where faulty blocks can be replaced or repaired. Computers for spacecraft and missiles are built as a one-piece unit.

Argon-12 computer without housing

"Argon-12" computer without housing

Airborne computers should be highly immune to environmental effects, which created serious problems during their development. Heat removal is very important because machines are compact. Forced air cooling of internal compartments is used in the majority of computers belonging to both groups. In airborne and mobile ground computers it is carried out by the central cooling system of a controlled installation, while in machines for spacecraft such as Argon-11С, Argon-12С and Argon-16 built-in fans are used. Missile computers Agron-11A and Argon 14 are encased into hermetically sealed housing which also functions as a heat sink. Shock absorbers are used to provide resistance to shocks and vibration. Sometimes special measures are taken for additional fastening of components. Some parts and units are covered with moisture-resistant varnishes.

A set of engineering, administrative, technological and production measures were taken to provide the highest possible reliability of computers. They included using very reliable components; electrical and thermal training of assemblies, blocks and system as a whole during their production; strict conformance to standards; creating special test equipment for technical inspection; fault, malfunction and failures analysis; acquisition and processing of reliability statistics; etc. The effectiveness of these measures has been proven by service experience of Argon computers.

However, for especially complex and crucial missile and space computer systems, where extremely high reliability requirements must be met, the measures taken were insufficient. That is why even despite tough weight and dimension limitations computers for such systems were designed with high level of redundancy.

Argon-11C became the first domestic computer for space vehicles where equipment redundancy was utilized. The machine was used in the automatic control system of the spacecraft that circled the Moon and returned to the Earth with soft landing (Zond program). Research conducted at the design stage made it possible to choose the optimal redundancy principle that saved computer resources and provided an acceptable reliability level. This was triple redundancy with polling by majority, so-called majorization. Argon-11C computer contains three identical functionally independent parallel channels with separate inputs and outputs. Majority control circuits form the resulted information of the three channels. Data synchronization is carried out by special signals transferred between channels. The channels also have data connections, which allows restoring information distorted because of malfunction in any channel.

Unlike Argon-11C where redundancy was supported at the whole machine level Argon-16 used triple reservation of the key units with reduced number of majority circuits. Every channel here contains inter-channel link units (ILU) providing information exchange between components of different channels. Each ILU comprises command and address bus interfaces, majority circuits, valves which allow locking majority circuits if necessary and a control register. Using ILU enabled information majorization by blocks thus making failure elimination systems considerably more effective and reducing the time and structural redundancy of the machine.

Argon-16 is a unique phenomenon in the world practice of on-board computers development. For the past 25 years the machine was used in Soyuz manned spacecraft, Progress transports, Salyut, Almaz, Mir and Mech-K space stations without any failure of their control systems. In this time more than 300 computers were produced, which is a record number for space computer manufacturing.

A highly reliable Argon-16 structure with triple redundancy was leveraged in Argon-17 computer designed for an inertial guidance system of an antimissile. The machine uses a bit-by-bit majorization in data and control buses and provides redundancy of interface components in the exchange processor. Such a structure ensures normal operation of the machine after errors occur in unlike bits of buses and their circuits in different channels. An important distinction of Argon-17 is its high radiation resistance, which guaranties mission fulfillment even in the case of nuclear explosion. This is achieved by a high-speed pulse radiation sensor and a special unit called Restarter. After the radiation level reaches a preset level the computational process is interrupted and the main registers are dumped to a specialized ferrite-core memory. When the missile leaves the dangerous area, the computer restarts from the point where its work was suspended.

To use mobile computers in the control system, a special interface to the system subscribers is necessary. The I/O device structure of mobiles is much more diversified than that of stationary computers because the former use signals of different forms - analog, pulse of various kinds, one-time, etc. That is why special data converters are needed.

One of the most complicated issues of design was the development of interfaces to objects. The information exchange system of Argon-16 is a good example showing high requirements for an I/O subsystem. It includes analog-to-digit and digit-to-analog converters, code-to-interval and code-to-pulse converters, relay signal unit with 72 inputs and 65 outputs, serial code transceiver, tape drive and printer interfaces. Simultaneous information exchange with 41 subscribers at a speed up to 80 Kbytes per second and connection up to 256 subscribers are possible. There is also a one-level interrupt system supporting 16 sources with dynamic prioritization.

Argon-12C, Argon-14 and Argon-17 computers use complex exchange systems either.

Airborne Computers of the Second Stage

The first stage of development played an extremely important role in the evolution of domestic machines. It allowed to form the basis for mobile computer design, to create the necessary industrial and test base, to define the development trends of architecture, element base, design, technology, software, circuitry and systems engineering, which predetermined the development not only of future Argon models, but also of mobiles in other industries and at enterprises countrywide.

By mid-70s the developers of military computers had to tackle absolutely new tasks. Airborne computers that had demonstrated high efficiency in controlling of engineering systems were to be introduced in military automated control systems, flight detection and homing systems, air traffic control systems at naval bases, aerial attack and reconnaissance systems. The machines for such systems had to comply with the same standards as stationary universal computers. They were to solve computational and information problems, use 32-bit grid, demonstrate high performance, have high capacity RAM and ROM, be equipped with sophisticated software.

By that time the scope of mobile computer models was extended by a major degree, and the labor input and cost of their development had increased. Domestic plants had produced a great number of machines intended, as a rule, for a particular system. Not differing much in features, they used custom instruction sets, unique design and structural solutions. That is why the problem of computers unification became especially acute. It was solved by transition from separate models with incompatible instruction sets to developing computer families based on the single architecture.

The architecture of stationary ES EVM computers was chosen as a basis for the next generation of mobile computers designed for solving computational, information and logical tasks with large quantities of processed and stored data. A powerful software system, a universal instruction set, 32-bit word length, modularity, standardized interfaces, multi-system properties and functional scalability intrinsic in ES EVM computers were of importance for building a series of promising machines. The compatibility with ES EMV allowed using quantity-produced stationary machines as an intermediate test bed during the trial of a control system thus accelerating the development of mobile computers, software and the system as a whole.

Special methods were applied to provide unification of computers used in various control systems of flying vehicles. In spite of the progress achieved in the element base development the rigid limitations on physical parameters required the instruction sets of the machines to be adapted to the control system characteristics. To solve the problem, an ingenious POISK architecture was developed which allowed adaptation of the instruction set to tasks by adding commands typical to specific problems.

The POISK architecture uses four groups of commands including usual command-type kernel statements, statements with more complex structure, special operators such as exchange, operation system and user statements. The word length in statements may vary. The number of statements can change from 157 to 256 depending on application. As research and operation experience showed, with the same element base computers based on POISK architecture out-perform usual single-address machines by the factor of 1.5 to 2.5 in productivity and threefold to fivefold in code compactness.

During the second stage of Argon family evolution a number of models based on the unified architectures were developed (A-30, A-40, A-50 with ES EVM architecture and C100, C101, C102 with POISK architecture). These machines were designed for full-scale production and wide usage in military systems. That is why primary attention was focused on lowering the labor demand and cost of their manufacturing, making them well controlled and maintainable, providing serviceability, creating universal models resistant to environmental effects for application in different military services.

The technology and circuits of ES EVM were chosen as the basis for the second-stage models.

The production technology of ES EVM, i.e. metal coating of through holes, was used to build PCBs for the second-stage computers. In comparison with laminating this method dramatically reduces production cycle and allows automation of technological and test operations. In this case the number of layers was augmented to 10 versus 5 in previous models.

Instead of book-like design used in the first Argon computers, the second-stage machines are based on a modular structure with several hierarchic levels. A doubled cell consisting of two boards connected with wires is the module of the next level above multilayer PCB. The cells are connected through electrical joints to a panel forming an accomplished unit. Beginning with A-30 model, wire wrap connections were first used in mobile computer units production, which made it possible to automate the production and testing of switching systems on the panel and to introduce necessary changes very quickly. Wire wrap connections became feasible due to developing of a special heat-resistant wire.

The units are installed in a common housing such as a case or a rack creating the fourth level where separate units are electrically connected by wire. Every functionally accomplished unit is equipped with independent power supply. Such a principle of functional modules allows creating modifications of computers which consist of a variety of units differing only by the housing (case or rack) and containing the units and interconnections.

A-30 computer is the first model in a series of unified high-performance 32-bit machines based on the ES EVM architecture, which are intended for processing and storing high volumes of information. A-30 is backward compatible with ES EVM-1 both by data and programs. The machine uses a set of standard ES EVM instructions except for those of decimal arithmetic commands and floating point operands. The model is controlled by firmware. Modules and standard units are widely used in the machine structure, which permits flexible change of its computational capabilities. The I/O subsystem consists of two multiplex channels (specialized and ES EVM); thus providing high-speed data exchange with subscribers in real time. Provision is made for the creation of multi-machine systems using channel-to-channel adapters.

The speed of the computer is 400,000 operations per second in RX format or 600,000 operations per second in RR format. RAM capacity is 32 Kbytes; ROM capacity is 256 Kbytes. The I/O channel bandwidth is 500 Kbps in burst mode or 200 Kbps in multiplex mode. A-30 computer is based on a specially designed 216 line of multi-chip LSIs.

A-40 machine is a medium-level model of high-end 32-bit computers based on the ES EVM architecture. It is a further development of A-30 model. Some improvements are done, including connecting additional I/O channels, an external memory and ES EVM I/O devices. The computer is controlled by firmware. The processor is based on a complex structure close to the ES 1060 computer which supports simultaneous execution of multiple instructions.

The distinctive feature of the machine is its software compatibility with Ritm-20 computer, which is achieved by advanced hardware and software emulation of Ritm instructions. The emulation of all logical instructions and arithmetic commands with fixed point is carried out by hardware, while the emulation of privileged instructions and commands with floating point is realized by software.

Data exchange is effected through an I/O channel integrated with a special processor. It uses a multiplex memory located in the main memory and an exchange buffer in the channel. A control and management console including an I/O interface simulator is specially developed for A-40. The simulator allows debugging and testing an I/O channel and supports channel modes impossible with usual I/O devices.

The instruction set includes a complete set of ES EVM-1 commands plus 60 hardware supported commands of Ritm computer. With Gibson 3E mixture A-40 performs at a speed of 140,000 operations per second. RAM capacity is 32 Kbytes; ROM capacity equals 128 Kbytes. The I/O channel throughput equals 650 Kbps in a burst mode or 65 Kbps in a byte-multiplex mode. MSIs of 134, 136, 130 and 133 series are used in the machine.

A-50 computer

A-50 computer

A-50 is a high-end model of unified high-performance 32-bit computers based on the ES EVM architecture. It widely uses circuitry, design and technological solutions developed for A-40 computer. At the same time the creation of more sophisticated components allowed to drastically increase its performance, RAM capacity and the number of I/O channels. Two A-50 computers can be clustered with direct control. There is a control console with serial interface; the CPU is equipped with cache and a microtest system. Tape drive and bubble memory ruggedized for tough service conditions and test equipment including a subscriber simulation console and an auxiliary computer are developed for the machine.

To increase the processor performance, the instruction unit circuitry is optimized, which corrects dependent commands. The computer is controlled by microcodes that comprise not only functional microcommands but also microtests for troubleshooting with a resolution up to a single cell. RAM and firmware contain double-error detecting and single-error correcting codes. The cache of original structure includes command and data buffers. The structure of I/O channels ensures a comparably high bandwidth with a minimum of hardware. The interaction of I/O channels is organized so that the I/O subsystem moderately reduces the CPU performance.

The instruction set consists of a complete set of ES EVM-1 commands and additional instructions for sine, cosine and reciprocal calculations. With Gibson 3E mixture A-50 performs at a speed of 540,000 operations per second. Its RAM capacity is 16 Mbytes. The total I/O channel throughput equals 4 Mbps in burst mode or 600 Kbps in a byte-multiplex mode. MSIs of 134, 136, 130 and 133 series are used in the machine.

A four-machine computational system for in-flight detecting and homing radar complex has been created on the basis of A-30 computer. The clusterized computers are equipped with channel-to-channel adapters and combined through a symmetrical system of intermachine connections. The complex includes a system console of direct control and an external synchronizer generating time stamps for all computers. The set performance of the computational system is achieved by distributing tasks among the machines. This ensures the redundancy of individual components and increases the system reliability. Using channel-to-channel adapters allows simultaneous data exchange between any of two pairs or between all four computers in time-sharing mode.

Beta-3M mobile computer system has been designed on the basis of A-40 computer. Capable to work in movement it is installed on a light multipurpose full-track armored chassis and destined for military automated control systems. As a part of a control system Beta-3M can receive and present information, solve information-logical and computational problems, store and display results both in an automatic mode and on requests from various control system units, and also can ensure data exchange with other computer systems.

A number of peripherals listed below has been developed for Beta-3M:

A-50 has become a basis for eight modifications of single- and two-machine computer systems developed in the framework of top-priority state programs. They are equipped with a wide array of external memory devices and multi-computer operation solutions. Clustering in two-machine systems is achieved through inter-computer exchange adapters with 1 Mbps throughput and an I/O controller which allows connecting up to 24 subscribers to each channel. A number of peripherals ruggedized for severe service conditions are developed for A-50-based systems:

The design of A-30, A-40 and A-50 computers allows using them in different installations thus extending the range of their application without creating new models.

The development of C100, C101 and C102 POISK-based computers began in late 1970s especially for fighter aircraft. The instruction sets of the machines are optimized for aircraft armament management.

C100, C101 and C102 computers are 16-bit synchronous multiaddress parallel machines which are controlled by firmware. They contain a CPU, RAM, ROM and an I/O device. C101 and C102 use dual bus architecture wherein one interface is fast synchronous and the other is slow asynchronous internal backbone one. C102 allows building a two-machine system which contains C101 and C102 computers under control of C101 through an intermachine adapter.

All the machines process fixed point data. The performance of C100 is 170,000 operations per second and that of C101 and C102 - 400,000 operations per second. RAM capacity of C100 is 8 Kbytes and that of C101 and C102 - 16 Kbytes. ROM capacity is 136 Kbytes for C100 or 384 Kbytes for C101 and C102. The throughput of I/O channels varies from 400 to 800 Kbps. C100 is based on 106 and 133 series ICs, C101 and C102 use 1802 and 1804 series chips.

SB 3580 computer

SB 3580 computer

C100, C101 and C102 machines with high computational power, compactness and high reliability can be classed among the best on-board computers. The total number of machines produced is over 4,000, which makes them the most mass-produced mobile computers in the world.

In mid80s the third stage of development of Argon computers began. In 1986, the state program was adopted whose goal was to create unified mobile computer families, so-called SB EVM, based on ES EVM, POISK and SM EVM architectures. Four models were developed at NII Argon. A number of interesting engineering solutions were realized in these machines but unfortunately they have never been put in production because of economic problems.

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